TensorFlow Lite Micro / LiteRT for Microcontrollers

Overview

Google's runtime library for executing trained TensorFlow models on microcontrollers. Originally TensorFlow Lite Micro (TFLM), rebranded LiteRT for Microcontrollers in 2024. Provides a kernel set optimized for Cortex-M, Tensilica HiFi, ARC, and RISC-V targets, with vendor backends for Arm Ethos-U, NXP eIQ, and ST X-CUBE-AI.

Benefits

• De-facto standard runtime for ML inference on MCUs
• Strong vendor backend ecosystem (Ethos-U, Helium, NPU acceleration)
• Quantized 8-bit inference fits in tens of kilobytes of flash
• Active maintenance from Google and the broader TFLite community

Limitations & Risks

• Operator coverage narrower than full TensorFlow — model architecture must be chosen with the runtime in mind
• Memory and timing tuning still require firmware-engineer attention
• TFLM-to-LiteRT rebrand has caused ecosystem confusion through 2024-26

Recommended Actions

Pilot for MCU-resident inference (audio classification, IMU gestures, vibration anomaly detection); benchmark with quantization and operator fusion enabled; pair with Edge Impulse for the surrounding data and training workflow.

Additional Notes

Pairs with #11 Edge ML Lifecycle Management practice and the Edge Impulse tool. Alternative runtimes include ONNX Runtime, microTVM, and vendor stacks (NXP eIQ, ST X-CUBE-AI) — TFLM/LiteRT remains the broadest by community size.

References & Links

• https://ai.google.dev/edge/litert/microcontrollers/overview
• https://github.com/tensorflow/tflite-micro